By | 24th May 2017

The VFO design is based on the AD9959 DDS which is capable of 20 X clock speed, for a 25MHz clock we can achieve over 200MHz however as I only require the VFO to operate at up to the 2M (144MHz) band 156MHz was suffice so running the clock multiplier at 16 X is enough. I bought a PCB with the DDS Chip already soldered on as my big fingers and poor eyesight prevent me from working with such microscopic technology, the added benefit is that the board comes with each output terminated with a lowpass filter and unity gain amplifier so making it a nice plug and play module – which keeps the design inline with my modular approach to building the transceiver.

Initially I considered the SI5351 Clock generator and this looked promising however there were several limitations which discouraged me from using the device, so I found the AD9959 DDS synthesier which gave me four independent outputs with amplitude control – that was the key thing for me as the VFO would need to cover 17-156 MHz, if I went down the route of using the SI5351 device then I was faced with the option of fixed tuned variable gain amplifiers for each band (8 in total) or designing a levelling AGC amplifier to keep the VFO output constant over the tuning range.

My proto-type consisted of the AD9959 DDS module and an Arudino DUE, I chose the DUE for several reasons; The fact it is a 3V3 device sits well with the 3V3 tolerant logic of the AD9959 and not having to worry about logic level converters if I was for example to use an AVR based controller, the DUE has a boat load of Digital and Analogue IO and the fact that you can have almost any Digital pin configured as an interrupt was very attractive.

Each independent DDS output has a function in the transceiver, CH0 is the VFO covering 17-154MHz giving access to my bands of interest – 7MHz, 14MHz, 21MHz, 28MHz for the HF section and 50MHz, 70MHz and 144MHz for the VHF section where CH1 is fixed at 10.250MHz for down mixing to the second receiver IF at 450KHz, CH2 running fixed at 450KHz for the receiver BFO (USB and LSB is selected through two switched mechanical filters) and finally CH3 which is dual-purpose; the primary function of CH3 is for the TX SSB exciter running at 10.7MHz and to function as a calibration output for servicing and setup.

The code is still work in progress and due to the complexity of the transceiver it will be a short time before it is finished (will it ever be finished or a perpetual work in progress?), however once I have a stable release I will make it available for download on this site.

Here is a short video showing the prototype in action:

I paid £78 inc postage to the UK from a Chinese supplier on Ebay, it took around 2 weeks for the board to arrive however it was worth the wait. Because I want to make the transceiver as modular and easy to maintain and change I have began to house the DDS assembly along with its split-rail power supply and MMIC amplifiers for each DDS channel in a metal enclosure, the cases I used are a little over the top for the application as they will be out of sight once built in to the final transceiver assembly however this is what I had to hand in the workshop.

The micro controller will be in its own metal enclosure which I will discuss later in another article, however I will make the source code available for download as it may be of use to someone working with the AD9959 – I spent close to 8 weeks of my spare time figuring out how to interface this device to an Arduino Due, however I managed to find some code already written for a similar DDS and just hacked it until I got a working prototype and then I spent some time making it tidy and “readable”, the trick with these Analogue Devices chips is understanding the registers.

For now, here are some “work in progress” pictures of the DDS assembly, note the large heatsink for the voltage regulator PCB, this was required due to the main 5V regulator dropping the 12V supply voltage – lot of heat to get rid of, I thought about using a switching regulator as they are more efficient however I wanted to keep the amount of potential noise sources as minimal as possible. I salvaged this heatsink from an old PMR transceiver and cut it to size to fit the assembly.

DDS VFO MMIC Amplifier section DDS VFO side view DDS VFO MMIC module mounting plate DDS VFO MMIC Module assembly DDS VFO Voltage Regulator Module

Will update this article once I have completed the assembly and I will upload a video of it working.

Cheers for now.



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